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List of Publications

  1. V.Amadio , M.Caldari , M.Conti , M.Coppola , E.Corinti , P.Crippa, S.Orcioni , C.Turchetti, "Virtual SoC Prototyping: Case Study for a Transactional Model of an USB Driver", accepted in the Conference "Design Automation and Test in Europe DATE 2002", March 4-8, 2002, Paris
  2. P.J. Ashenden, J.P. Mermet, R. Seepold, editors, System-on-Chip Methodologies & Design Languages, Kluwer Academic Publishers, ISBN 0-7923-7393-6, June 2001.
  3. Bergmann, R. Experience Management: Foundations, Development Methodology, and Internet-Based Applications. Habilitation Thesis. Publication forthcomming.
  4. Ralph Bergmann, Rainer Maximini, Martin Schaaf. "Experience Management for Electronic Design Reuse through Quality-Oriented IP Selection." Submitted to the German Workshop on Experience Management 2002.
  5. Blasco, E. Villar, F. Herrera. 'System-Level Dynamic Estimation of Time Performance for Codesign based on SystemC and HW/SW platform' Conference on Design of Circuits and Integrated System (DCIS), November 2002
  6. J. Borel, A. Sauer, R.f Seepold, "Evaluation of Technology and the MEDEA Design Automation Roadmap", in Virtual Components Design and Reuse, Kluwer Academic Publishers, ISBN 0-7923-7261-1, pp. 13-20, 2001.
  7. M.Caldari, M.Conti, M.Coppola, M.Giuliodori, C.Turchetti, "System Level Design using C++ for the modeling of an Ethernet MAC core", Proceedings of the World Multi-Conference on Systemics, Cybernetics and Informatics SCI 2001, Special Section on "SoC for real-time information processing", Co-organized by IEEE Computer Society, ISBN 980-07-7529-3, July 22-25, 2001, Orlando, FL.
  8. M.Caldari, M.Conti, M.Coppola, M.Giuliodori, C.Turchetti, "C++ based System-On-Chip Design", IEEE Canadian Jou. on Electrical and Computer Engineering, vol. 26, No.3/4, special issue on SoC, pp.115-123, July/October 2001.
  9. M.Caldari, M.Conti, P.Crippa, G.Nuzzo, S.Orcioni, C.Turchetti, "Instruction based power consumption estimation methodology", Proc. of IEEE Int. Conf. on Electronics, Circuits and Systems 2002, ICECS02, sept. 15-18 Dubrovnik, Croatia
  10. M.Caldari, M.Conti, P.Crippa, G.Nuzzo, S.Orcioni, C.Turchetti, "Instruction based power consumption estimation methodology", Proc. of IEEE Int. Conf. on Electronics, Circuits and Systems 2002, ICECS02, sept. 15-18 Dubrovnik, Croatia
  11. F. Casado, F. Machado, N. Martínez Madrid, R. Seepold, P. Neumann, Y. Torroja, "Study of different kind of tools to analyse the quality of HDL designs. Comparison of their coverage of the RMM recommendations",in Proc. Conference on Design of Circuits and Integrated Systems (DCIS), Porto, November 2001.
  12. Deppe, M. Robrecht, M. Zanella, Wolfram Hardt, Rapid Prototyping of Real-Time Control Laws for Complex Mechatronic Systems, In 12th IEEE International Workshop on Rapid System Prototyping. Monterey, CA, IEEE Computer Society Press, 2001.
  13. Ghanmi, A.Ghrab, M.Hamdoun, B.Missaoui, G.Saucier, K.Skiba. E-Design Based on theReuse Paradigm. Design Automation and Test in Europe (DATE), March 2002.
  14. L.Ghanmi,, B.Missaoui, K.Skiba. Intranet Based IP Supply Chain for SoC Project Management. International Workshop on IP-Based SoC Design, December 2001.
  15. A.J. Ginés, E. Peralías, A. Rueda, N. Martínez Madrid, R. Seepold, "A Mixed-Signal Design Reuse Methodology Based on Parametric Behavioural Models with Non-Ideal Effects", in Proc. Conference on Design Automation and Test in Europe (DATE 2002), Paris, 4.-March 2002.
  16. J. Haase, N. Martínez Madrid, P. Neumann, M. Radetzki, R. Seepold, A. Vörg, "Automated Qualification Flow for Soft IP", in Proc. MEDEA+ Conference on Application-Oriented SoC Design, October 2001.
  17. M.Hamdoun, A.Ghrab, P.Hernandez, G.Saucier. IP XML Encapsulation Portal. International Workshop on IP-Based SoC Design, December 2001.
  18. C. Hansen, O. Bringmann, W. Rosenstiel, "A VHDL Reuse Component Model for Mixed Abstraction Level Simulation and Behavioral Synthesis", in Virtual Components Design and Reuse, R. Seepold and N. Martínez (eds.), Kluwer Academic Publishers, 2001.
  19. Stefan Ihmor, Markus Visarius, Wolfram Hardt, "A Consistent Design Methodology for Configurable HW/SW-Interfaces in Embedded Systems". In Proceedings of DIPES 2002, Montreal Aug. 2002.
  20. S. Ihmor, M.Visarius, W. Hardt, "A Design Methodology for Application-specific Real-Time Interfaces", Proceedings of International Conference on Computer Design, Germany, 2002
  21. N. Martínez, Eduardo Peralias, Antonio Acosta, Adoracion Rueda, "Analog/Mixed-Signal IP Modeling for Design Reuse", in Proc. DATE Conference, Munich, March 2001.
  22. N. Martínez Madrid, R. Seepold, "Virtual Component Reuse and Qualification for Digital and Analogue Design", in System-on-Chip Methodologies & Design Languages, Kluwer Academic Publishers, ISBN 0-7923-7393-6, pp. 307-316, 2001.
  23. N. Martínez Madrid, "Mixed-signal reuse in the MEDEA+ TOOLIP project", Workshop on Mixed-Signal IP Blocks, Paris, March 8, 2002.
  24. N. Martínez Madrid, "System-Level Design Reuse for Embedded Applications", PhD Course, University Carlos III of Madrid, June 2002.
  25. N. Martínez Madrid, "Multi-level analog/mixed-signal IP specification", Forum on Design Languages, Marseille, September 2002 (to appear).
  26. H.N. Nguyen "A Meet-in-the-Middle Verification Strategy", Proceedings of the IP-Based SoC Design Workshop, December 6-7, 2001, Grenoble.
  27. M. Radetzki, P. Neumann, J. Haase, N. Martinez Madrid, R. Seepold, A. Vörg, "Automated Qualification Flow for Soft IP", Proceedings of the MEDEA+ Conference on Application-Oriented SoC Design, October 10-12, 2001, Veldhoven, The Netherlands.
  28. M. Radetzki. Qualität und Qualitätssicherung wiederverwendbarer Schaltungsbeschreibungen. In: Informationstechnik und technische Informatik (it+ti) 44 (2002) 2.
  29. Achim Rettberg, Wolfgang Thronicke, "Embedded System Design based on Webservices", Design, Automation and Test in Europe - DATE 2002, Paris, 4-8 March. 2002.
  30. M. Schaaf, M. Visarius, R. Bergmann, R. Maximini, M. Spinelli, J. Lessmann, W. Hardt, S. Ihmor, W. Thronicke, C. Tautz, R. Traphoener, "IPCHL - A Description Language for Semantic IP Characterization", Forum on Design Languages 2002, Marseille, September 2002.
  31. R. Seepold, "Standardization of System-Level IP", in Proc. Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und System - GI/ITG/GMM-Workshop, February 2001.
  32. R. Seepold, "Specification and Standardization of System-Level IP", in Proc. IP Forum, May 14-15, 2001.
  33. R. Seepold, "Reuse of Virtual Components", in Design of Hardware/Software Embedded Systems (Eugenio Villar, Ed.), ISBN 84-8102-284-5, 2001.
  34. R. Seepold, N. Martínez, editors, Virtual Components Design and Reuse, Kluwer Academic Publishers, ISBN0-7923-7261-1, 2001.
  35. R. Seepold, N. Martínez Madrid, A. Vörg, W. Rosenstiel, M. Radetzki, P. Neumann, J. Haase, "A Qualification Platform for Design Reuse", in Proc. 2002 International Symposium on Quality of Electronic Design (ISQED 2002), San Jose, CA, 18.-March 2002.
  36. R. Seepold, N. Martínez Madrid, "System Level Design Reuse" . In: Informationstechnik und technische Informatik (it+ti) 44 (2002) 2. (In German)
  37. R. Seepold, "Presentation of TOOLIP Activities", E-Kompass Workshop, Bonn, April 17-18, 2002.
  38. R. Seepold et al. "Intellectual Property Design and Integration for Sytem-on-Chip", Tutorial at the 39th Design Automation Conference (DAC), New Orleans, June14, 2002.
  39. SystemC 2.0 language specification (Synopsys, Cadance, Motorola, STM,Fujitsu, CoWare) http://www.systemc.org
  40. Vörg, R. Seepold, N. Martínez, W. Rosenstiel, "IP-Qualifizierung wiederverwendbarer Schaltungsbeschreibungen", in Proc. 8. ITG-Fachtagung 10. E.I.S.-Workshop, Dresden, April 2001.
  41. Vörg, R. Seepold, N. Martínez, W. Rosenstiel, "IP-Qualification, Reuse, IP-Packaging", in Proc. Forum on Design Languages 2001, Lyon, September 2001.
  42. M.Visarius, W. Hardt, et.al. Requirements on IP Qualifying Format. Technical Report, Universität Paderborn. 2001, Germany.
  43. W.Yan, R.Willems "Proposed Content-part of IPQ Transfer Format", Poster session of EcompaSS, Apr 17/18 2002, Bonn, Germany,

© Andreas Vörg, FZI Karlsruhe, 2001-02